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TIA 56 Transimpedance Amplifier
TIA 56 is a transimpedance amplifier for the receiver in high-speed opto-electronic transmission systems. Due to the broadband design, the chip can be operated even in small-signal as well as in limiting mode. A strictly differential circuit is used. Both, input and output are terminated with 50O.
The TIA 56 is a product under development. First silicon is expected to be available in late 2008.
TIA 56 is the successor of the MA40, using state-of-the-art SiGe technology with fT ~ 200GHz. The chip consists of two main amplifier stages, both in a modified Cherry-Hooper architecture. The subsequent output buffer is optimizied to drive a 50O external load. Input and output are terminated with 50O for optimum reflection coefficients. At the ouput high-ohmic resistors are implemented to tap the DC levels of the output signal without influencing the overall frequency response. An offest current can be injected into the OFFS pins.
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